Integrated circuits are typically formed on a semiconductor substrate, such as a silicon wafer or other semiconductive material. In general, layers of various materials which are either semiconducting, conducting or insulating, are utilized to form the integrated circuits. By way of example, various materials are doped, ion implanted, deposited, etched, grown, etc. using various processes. A continuing goal in semiconductor processing is to reduce the size of individual electronic components, thereby enabling smaller and denser integrated circuitry.
One type of integrated circuitry comprises memory circuitry, for example dynamic random access memory (DRAM). Such comprises an array of memory cells where individual cells include a transistor and a capacitor. The capacitor electrically connects with one of the source/drain regions of the transistor and a bit or a digit line electrically connects with the other of the source/drain regions of the transistor. DRAM circuitry might be constructed such that the capacitors are elevationally higher within the substrate than the bit line (buried bit line construction), or alternately with the bit line fabricated elevationally higher or outwardly of the capacitor (bit line-over-capacitor construction). The invention was principally motivated in addressing issues associated with buried bit line memory circuitry, although the invention is in no way so limited, nor is it limited to memory integrated circuitry. Rather, the invention is limited only by the accompanying claims as literally worded without interpretative or limiting reference to the specification and drawings herein, and in accordance with the doctrine of equivalents.